Pipelining is the process of accumulating instruction from the processor through a pipeline. It allows storing and executing instructions in an orderly process. It is also known as pipeline processing. Pipelining is a technique where multiple instructions are overlapped during execution.
An accumulator is a type of register included in a CPU. It acts as a temporary storage location which holds an intermediate value in mathematical and logical calculations. Intermediate results of an operation are progressively written to the accumulator, overwriting the previous value. For example, in the operation "3 + 4 + 5," the accumulator would hold the value 3, then the value 7, then the value 12. The benefit of an accumulator is that it does not need to be explicitly referenced, which conserves data in the operation statement.
Locality of reference refers to a phenomenon in which a computer program tends to access same set of memory locations for a particular time period. In other words, Locality of Reference refers to the tendency of the computer program to access instructions whose addresses are near one another.
Registers are a type of computer memory used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU. The registers used by the CPU are often termed as Processor registers.
MAR register is used to access data and instructions from memory during the execution phase of instruction. MAR holds the memory location of data that needs to be accessed. When reading from memory, data addressed by MAR is fed into the MDR (memory data register) and then used by the CPU. When writing to memory, the CPU writes data from MDR to the memory location whose address is stored in MAR. MAR, which is found inside the CPU, goes either to the RAM (random-access memory) or cache.
Consider a computer system with speed of 106 instructions per second. A program P, having 2n2 steps is run on this system, where n is the input size. If n = 10000, what is the execution time for P?
Programmed I/O: In program-controlled I/O, the processor program controls the complete data transfer. So only when an I/O transfer instruction is executed, the transfer could take place. It is required to check that device is ready/not for the data transfer in most cases. Usually, the transfer is to & from a CPU register & peripheral. Here, CPU constantly monitors the peripheral. Here, until the I/O unit indicates that it is ready for transfer, the CPU wait & stays in a loop. It is time-consuming as it keeps the CPU busy needlessly.
Consider the following minterm for F:F(P, Q, R, S) = Σ0, 2, 5, 7, 8, 10, 13, 15. The minterms 2, 7, 8, and 13 are don't care terms. The minimal sum of products form for F is
A bulb in the staircase has two switches, one switch is at the ground floor and the other one is at the first floor. The bulb can be turned ON and also can be turned OFF by any of the switches irrespective of the state of the other switch. The logic of the switching of the bulb resembles
Suppose we have a 10-bit computer that uses 10-bit floating point computational unit (Float number uses IEEE floating-point arithmetic where a floating point number has 1 sign bit, 5 exponent bits, and 4 fraction bits). The representation for +∞ (plus infinity) is
A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4 -way set associative. The minimum size of the TLB tag is:
Suppose the largest n bit number requires ‘d’ digits in decimal representation. Which of the following relations between ‘n’ and ‘d’ is approximately correct
The Hexadecimal digits are 0-9 and A-F. The Hexadecimal system represents numbers in16 symbols, zero to nine and ten to fifteen is represented by the English alphabet A-F.
The Hexadecimal character represents 4 bits.
The last memory location in a memory of size 64K is FFFF.